Parity bit is the least accurate form of error checking, but it can be performed extremely fast in hardware and therefore it has an important place in data transmission. Parity bit is added to the data packet to ensure that there is an even number of ones in the packet. It can be fooled by a 2-bit error.
Check-sum will catch a two-bit error, but check-sum can be fooled if two eight-bit words are received out of order, as in the example above, or if there is multiple zero-bit inserted that leaves the check-sum intact.
CRC performs a mathematical manipulation of all the bits (e.g. a polynomial formula) and therefore it is sensitive to the position of all the bits, as well as their values. Therefore CRC will detect that two eight-bit words have been received in the wrong order, but it takes a lot more computing power to perform CRC.
